1. Field of the Invention
The invention relates to a display driving circuit, and more particularly, to a display driving circuit capable of solving a cold start problem.
2. Description of the Prior Art
Liquid crystal displays (LCDs) have the advantages of slim size, low power consumption and no radiation. The LCD has become one of the most widely used flat panel displays. The principle of the LCD is to apply an electric field to a liquid crystal layer, which changes alignment of liquid crystal molecules to adjust light transmittance. The LCD further requires a light source provided by a backlight module and a color filter to produce color images. FIG. 1 is a schematic diagram of a conventional LCD 100. With reference to FIG. 1, the LCD 100 comprises a display panel 110, a timing controller 120, a gate driver 130 and a source driver 140. The display panel 110 comprises a plurality of pixels units 150, a plurality of data lines D1˜DM and a plurality of gate lines G1˜GN. The timing controller 120 provides control signals for driving the gate driver 130 and the source driver 140. The gate driver 130 produces a plurality of gate signals according to the control signals. The gate lines G1˜GN and data lines D1˜DM provide the gate signals and the data signals which are generated by the gate driver 130 and the source driver 140 to the pixel units 150 to produce an image, respectively.
In order to reduce manufacturing costs, the gate driver 130 can be integrated into the display panel 110 with the pixel units 150 to replace conventional gate driver ICs, saving on IC use and reducing the number of signal traces. Both such techniques and conventional gate driver ICs require shift registers and level shifters. The level shifter functions to raise original control signals to a higher voltage level for driving the gate driver. In practice, such technique applies a thin-film transistor (TFT) n-type metal-oxide-semiconductor (NMOS) process to construct shift registers, and the level shifters are integrated in pulse width modulation (PWM) ICs, which is different from conventional gate driver ICs that apply a complementary metal-oxide-semiconductor (CMOS) process to integrate shift registers and level shifters into a single chip. However, due to the process and the number of masks, TFT NMOS circuit characteristics are not as good as CMOS circuit characteristics. Thus, it is necessary to set a higher gate-source voltage (VGS) for TFT NMOS devices, and fabricate devices with larger size to obtain the same current. VGS(off) of the transistors must also be low.
Furthermore, the device characteristics may drift due to process variation. This causes the shift registers to malfunction during a cold start. FIG. 2 is a circuit diagram of a shift register 200 according to the prior art. FIG. 3A illustrates a timing diagram of the shift register 200 under normal operation. When started at room temperature, start pulse signal ST sends out a pulse to raise a node CP1 to a voltage level similar to ST. When the clock signal CLK is sent out, the original potential kept in Cgd of transistor M2 raises the voltage level of node CP1 via coupling. At this time, the transistor M2 is turned on and transmits the CLK signal to output terminal SR_OUT. Output of the gate signal at the first stage is completed. However, when started at a low temperature, because of the drop in current provided by M2 (i.e. conduction of devices is weak) and the leakage current of M4, the voltage level of SR_OUT can not be raised if the size and the VGS of the devices are fixed, leading to abnormal signal output, as shown in FIG. 3B.
FIG. 4 illustrates a circuit that generates control signals for driving the gate driver 140. When started at room temperature, all of the gate signals can be generated normally by two-stage charge pump circuit 410 (not including charge pump 430). But, when started at low temperature, as described above, the transistors are unable to be fully turned on if the size and the VGS of the devices are fixed. As a result, the gate signals are outputted abnormally. Currently, this problem is solved by adding one more charge pump stage 430 to raise the high working voltage VGH of the gate driver 130, that is, to enhance turning-on of the transistors and to improve the driving ability of the current. The circuit utilizing the conventional solution to address the cold start problem has the following disadvantages:    1. Printed circuit board (PCB) area increases due to adding the extra charge pump circuit stage 430.    2. Power consumption increases due to the extra charge pump circuit stage 430.    3. Output voltage of the charge pump is fixed, and cannot be adjusted flexibly. The device characteristics also vary, necessitating the addition of Zener diodes to meet power source specifications required by the gate driver 130. The voltage setting is inflexible and costs increase.